// Generated for: spectre
// Generated on: Apr 13 01:41:45 2010
// Design library name: Tutorial
// Design cell name: TB_1bAdd_SUB
// Design view name: schematic
simulator lang=spectre
global 0 vdd!
parameters OutCap=.01p Ain=5 Bin=0 SelIn=0 Cin=0
include "/net/cadence/ncsu-cdk/ncsu-cdk-1.5.1/models/spectre/standalone/ami06P.m"
include "/net/cadence/ncsu-cdk/ncsu-cdk-1.5.1/models/spectre/standalone/ami06N.m"

// Library name: Tutorial
// Cell name: cgInverter
// View name: schematic
subckt cgInverter VDD VSS in out
    P0 (out in VDD VDD) ami06P w=3u l=600n as=4.5e-12 ad=4.5e-12 ps=9u \
        pd=9u m=1 region=sat
    N0 (out in VSS VSS) ami06N w=1.5u l=600n as=2.25e-12 ad=2.25e-12 ps=6u \
        pd=6u m=1 region=sat
ends cgInverter
// End of subcircuit definition.

// Library name: Tutorial
// Cell name: cgblsMirrorAdder
// View name: schematic
subckt cgblsMirrorAdder A B CIN COUT SUM
    I3 (vdd! 0 net45 COUT) cgInverter
    I0 (vdd! 0 net33 SUM) cgInverter
    N11 (net9 B 0 0) ami06N w=1.5u l=600n as=2.25e-12 ad=2.25e-12 ps=6u \
        pd=6u m=1 region=sat
    N10 (net13 A net9 0) ami06N w=1.5u l=600n as=2.25e-12 ad=2.25e-12 \
        ps=6u pd=6u m=1 region=sat
    N9 (net33 CIN net13 0) ami06N w=1.5u l=600n as=2.25e-12 ad=2.25e-12 \
        ps=6u pd=6u m=1 region=sat
    N8 (net29 CIN 0 0) ami06N w=1.5u l=600n as=2.25e-12 ad=2.25e-12 ps=6u \
        pd=6u m=1 region=sat
    N7 (net29 B 0 0) ami06N w=1.5u l=600n as=2.25e-12 ad=2.25e-12 ps=6u \
        pd=6u m=1 region=sat
    N6 (net29 A 0 0) ami06N w=1.5u l=600n as=2.25e-12 ad=2.25e-12 ps=6u \
        pd=6u m=1 region=sat
    N5 (net33 net45 net29 0) ami06N w=1.5u l=600n as=2.25e-12 ad=2.25e-12 \
        ps=6u pd=6u m=1 region=sat
    N4 (net37 B 0 0) ami06N w=1.5u l=600n as=2.25e-12 ad=2.25e-12 ps=6u \
        pd=6u m=1 region=sat
    N3 (net5 B 0 0) ami06N w=1.5u l=600n as=2.25e-12 ad=2.25e-12 ps=6u \
        pd=6u m=1 region=sat
    N2 (net5 A 0 0) ami06N w=1.5u l=600n as=2.25e-12 ad=2.25e-12 ps=6u \
        pd=6u m=1 region=sat
    N1 (net45 A net37 0) ami06N w=1.5u l=600n as=2.25e-12 ad=2.25e-12 \
        ps=6u pd=6u m=1 region=sat
    N0 (net45 CIN net5 0) ami06N w=1.5u l=600n as=2.25e-12 ad=2.25e-12 \
        ps=6u pd=6u m=1 region=sat
    P11 (net33 CIN net52 vdd!) ami06P w=1.5u l=600n as=2.25e-12 \
        ad=2.25e-12 ps=6u pd=6u m=1 region=sat
    P10 (net52 B net56 vdd!) ami06P w=1.5u l=600n as=2.25e-12 ad=2.25e-12 \
        ps=6u pd=6u m=1 region=sat
    P9 (net56 A vdd! vdd!) ami06P w=1.5u l=600n as=2.25e-12 ad=2.25e-12 \
        ps=6u pd=6u m=1 region=sat
    P8 (net33 net45 net73 vdd!) ami06P w=1.5u l=600n as=2.25e-12 \
        ad=2.25e-12 ps=6u pd=6u m=1 region=sat
    P7 (net73 CIN vdd! vdd!) ami06P w=1.5u l=600n as=2.25e-12 ad=2.25e-12 \
        ps=6u pd=6u m=1 region=sat
    P6 (net73 B vdd! vdd!) ami06P w=1.5u l=600n as=2.25e-12 ad=2.25e-12 \
        ps=6u pd=6u m=1 region=sat
    P5 (net73 A vdd! vdd!) ami06P w=1.5u l=600n as=2.25e-12 ad=2.25e-12 \
        ps=6u pd=6u m=1 region=sat
    P4 (net45 A net80 vdd!) ami06P w=1.5u l=600n as=2.25e-12 ad=2.25e-12 \
        ps=6u pd=6u m=1 region=sat
    P3 (net45 CIN net93 vdd!) ami06P w=1.5u l=600n as=2.25e-12 ad=2.25e-12 \
        ps=6u pd=6u m=1 region=sat
    P2 (net80 B vdd! vdd!) ami06P w=1.5u l=600n as=2.25e-12 ad=2.25e-12 \
        ps=6u pd=6u m=1 region=sat
    P1 (net93 B vdd! vdd!) ami06P w=1.5u l=600n as=2.25e-12 ad=2.25e-12 \
        ps=6u pd=6u m=1 region=sat
    P0 (net93 A vdd! vdd!) ami06P w=1.5u l=600n as=2.25e-12 ad=2.25e-12 \
        ps=6u pd=6u m=1 region=sat
ends cgblsMirrorAdder
// End of subcircuit definition.

// Library name: Tutorial
// Cell name: 2_1mux
// View name: schematic
subckt Tutorial_2_1mux_schematic Ain Bin Sel Sel_bar out vdd vss \
        inh_inh_bn
    M7 (net18 Sel_bar vdd vdd!) ami06P w=1.5u l=600n as=2.25e-12 \
        ad=2.25e-12 ps=6u pd=6u m=1 region=sat
    M6 (net18 Ain vdd vdd!) ami06P w=1.5u l=600n as=2.25e-12 ad=2.25e-12 \
        ps=6u pd=6u m=1 region=sat
    M5 (out Sel net18 vdd!) ami06P w=1.5u l=600n as=2.25e-12 ad=2.25e-12 \
        ps=6u pd=6u m=1 region=sat
    M4 (out Bin net18 vdd!) ami06P w=1.5u l=600n as=2.25e-12 ad=2.25e-12 \
        ps=6u pd=6u m=1 region=sat
    M3 (net22 Sel vss gnd!) ami06N w=1.5u l=600n as=2.25e-12 ad=2.25e-12 \
        ps=6u pd=6u m=1 region=sat
    M2 (out Bin net22 gnd!) ami06N w=1.5u l=600n as=2.25e-12 ad=2.25e-12 \
        ps=6u pd=6u m=1 region=sat
    M1 (out Ain net31 gnd!) ami06N w=1.5u l=600n as=2.25e-12 ad=2.25e-12 \
        ps=6u pd=6u m=1 region=sat
    M0 (net31 Sel_bar vss gnd!) ami06N w=1.5u l=600n as=2.25e-12 \
        ad=2.25e-12 ps=6u pd=6u m=1 region=sat
ends Tutorial_2_1mux_schematic
// End of subcircuit definition.

// Library name: Tutorial
// Cell name: BIGInverter
// View name: schematic
subckt BIGInverter VDD VSS in out
    MP (out in VDD VDD) ami06P w=12.0u l=600n as=1.8e-11 ad=1.8e-11 \
        ps=27.0u pd=27.0u m=1 region=sat
    MN (out in VSS VSS) ami06N w=6u l=600n as=9e-12 ad=9e-12 ps=15.0u \
        pd=15.0u m=1 region=sat
ends BIGInverter
// End of subcircuit definition.

// Library name: Tutorial
// Cell name: blsInverter
// View name: schematic
subckt blsInverter VDD VSS in out
    MP (out in VDD VDD) ami06P w=6u l=600n as=9e-12 ad=9e-12 ps=15.0u \
        pd=15.0u m=1 region=sat
    MN (out in VSS VSS) ami06N w=3u l=600n as=4.5e-12 ad=4.5e-12 ps=9u \
        pd=9u m=1 region=sat
ends blsInverter
// End of subcircuit definition.

// Library name: Tutorial
// Cell name: TB_1bAdd_SUB
// View name: schematic
I9 (net015 net040 net0118 net068 net064) cgblsMirrorAdder
I8 (net014 net052 net080 net036 net040 vdd! 0 0) Tutorial_2_1mux_schematic
I12 (vdd! 0 net064 net065) BIGInverter
I5 (vdd! 0 net068 net010) BIGInverter
C1 (net065 0) capacitor c=OutCap m=1
C0 (net010 0) capacitor c=OutCap m=1
V0 (vdd! 0) vsource type=dc dc=5
I16 (vdd! 0 net0149 net0118) blsInverter
I15 (vdd! 0 Cin net0149) blsInverter
I10 (vdd! 0 net014 net052) blsInverter
I11 (vdd! 0 net080 net036) blsInverter
I14 (vdd! 0 net077 net080) blsInverter
I13 (vdd! 0 sel net077) blsInverter
I3 (vdd! 0 net9 net015) blsInverter
I6 (vdd! 0 B net029) blsInverter
I7 (vdd! 0 net029 net014) blsInverter
I0 (vdd! 0 A net9) blsInverter
include "./_graphical_stimuli.scs"
simulatorOptions options reltol=1e-3 vabstol=1e-6 iabstol=1e-12 temp=27 \
    tnom=27 scalem=1.0 scale=1.0 gmin=1e-12 rforce=1 maxnotes=5 maxwarns=5 \
    digits=5 cols=80 pivrel=1e-3 ckptclock=1800 \
    sensfile="../psf/sens.output" checklimitdest=psf 
tran tran stop=60n write="spectre.ic" writefinal="spectre.fc" \
    annotate=status maxiters=5 
finalTimeOP info what=oppoint where=rawfile
modelParameter info what=models where=rawfile
element info what=inst where=rawfile
outputParameter info what=output where=rawfile
designParamVals info what=parameters where=rawfile
primitives info what=primitives where=rawfile
subckts info what=subckts  where=rawfile
saveOptions options save=allpub
